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Memory architecture
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71	IEEE TRANSACTIONS ON COMPUTERS, VOL. 52, NO. 3, MARCH 2003 Add to Reading List Source URL: www.biblioteca.uma.es Language: English Cache Computing Computer memory Compiler optimizations Computer engineering Computer architecture CPU cache Central processing unit Optimizing compiler Loop interchange Cache-oblivious algorithm
72	Missing Pieces for HPC Container Mobility The Production Wall Spinning up production-like environment is… Add to Reading List Source URL: qnib.org Language: English - Date: 2016-07-03 12:03:58 Software System software Computer architecture Computer memory Cgroups LXC Remote direct memory access Kernel Singularity Mellanox Technologies Linux containers Open MPI
73	A Caching Mechanism Based on Data Freshness Yasunari Takatsuka, Hiroya Nagao, Takashi Yaguchi, Masatoshi Hanai, Kazuyuki Shudo Tokyo Institute of TechnologyOokayama, Meguro-ku, TokyoJapan Email: takatsu Add to Reading List Source URL: www.shudo.net Language: English - Date: 2016-01-18 20:27:26 Computer architecture Cache Computing Computer hardware Computer engineering Cache algorithms Latency Computer data storage Solid-state drive CPU cache Draft:Cache memory
74	Session 1: Applications and Algorithms Using Hardware Accelerators • Towards Seismic Wave Modeling on Heterogeneous Many-core Architectures using Task-based Runtime System. Victor Martinez, David Michea, Fabrice Dupros Add to Reading List Source URL: www2.sbc.org.br Language: English - Date: 2015-11-17 13:13:59 Computing Computer architecture Computer engineering Parallel computing Computer memory Manycore processors Dynamic random-access memory Multi-core processor Cache Blue Gene General-purpose computing on graphics processing units Random-access memory
75	WCET Driven Design Space Exploration of an Object Cache Benedikt Huber, Wolfgang Puffitsch, Martin Schoeberl JTRES’10 Computer Architecture Design for Add to Reading List Source URL: d3s.mff.cuni.cz Language: English - Date: 2010-08-17 06:40:02 Computing Computer engineering Cache Computer hardware Computer memory Computer architecture Central processing unit CPU cache Worst-case execution time Draft:Cache memory Cache algorithms
76	Lecture 5: More on Cache Memory William Gropp www.cs.illinois.edu/~wgropp Simplified Computer Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-01-15 10:20:46 Computer memory Computing Computer architecture Computer hardware Cache Computer engineering Central processing unit CPU cache Memory hierarchy Random-access memory Draft:Cache memory Scratchpad memory
77	hwloc: a Generic Framework for Managing Hardware Affinities in HPC Applications Fran¸cois Broquedis, J´erˆome Clet-Ortega, St´ephanie Moreaud, Nathalie Furmento, Brice Goglin, Guillaume Mercier, Samuel Thibault, Raym Add to Reading List Source URL: hal.inria.fr Language: English - Date: 2016-06-17 14:31:53 Computing Computer architecture Parallel computing Message Passing Interface Multi-core processor CPU cache Opteron Zen Thread Multiprocessing Multithreading Draft:Cache memory
78	Design and Implementation of MPICH2 over InfiniBand with RDMA Support Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2016-08-16 11:52:12 Computing Computer networks Supercomputers Computer memory Remote direct memory access Free software MPICH Virtual Interface Architecture Zero-copy InfiniBand Storage area network Mellanox Technologies
79	Formalising GPU memory models John Wickerson 1 / Tyler Sorensen 2,3 / Daniel Poetzl 2,4 / Mark Batty 5 / Jade Alglave 2 / Alastair Donaldson 1 1 Imperial College London / 2 University College London / 3 University of Uta Add to Reading List Source URL: carp.doc.ic.ac.uk Language: English - Date: 2014-01-20 09:48:39 Computing Concurrent computing Parallel computing GPGPU Computer architecture Graphics hardware Video cards OpenCL CUDA Graphics processing unit Thread General-purpose computing on graphics processing units
80	DRAFT Document for a Standard Message-Passing Interface Message Passing Interface Forum February 8, 2015 This work was supported in part by NSF and ARPA under NSF contract CDAand Esprit under project HPC Standar Add to Reading List Source URL: meetings.mpi-forum.org Language: English - Date: 2015-02-11 14:00:02 Computing Computer programming Software engineering Data types Parallel computing C++ Memory management Distributed computing architecture Message Passing Interface Pointer C dynamic memory allocation C++ classes

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